The memory cells in semiconductor memories are frequently arranged in a so-called “virtual ground array” in order to reduce the chip area required for the semiconductor memory. In such memory arrays the memory cells are arranged in rows and columns. The gates of memory cells arranged along rows are connected by a same wordline. The source/drain regions of memory cells arranged along columns are connected to the same bitlines. Each bitline is shared by memory cells of two adjacent columns of the array in order to reduce chip area.
The storage density of semiconductor memories with virtual ground arrays can be further increased by using memory cells that can store more than one bit per cell. An example of such memory cells are nitride read-only memory (NROM) cells, which are non-volatile and can store two bits per cell in a nitride layer.
Generally, when performing an operation on a memory cell, such as programming, erasing or reading, one or more of the neighboring memory cells may also be affected by the operation. This unwanted change in unselected cells is known as “neighbor effect” or as “disturb problem”. In virtual ground arrays the neighbor effect is caused by sharing a bitline between two memory cells that are connected by the same wordline.
FIG. 1 is used to illustrate the neighbor effect during a read operation. The memory cell MC is selected for reading by closing the switching elements SE of the bitlines BL1 and BL2, which connect the source S and the drain D of the memory cell MC. As a result the bitline BL1 is connected to the first global bitline GB1 and the bitline BL2 is connected to the second global bitline GB2. The bitlines BL0 and BL3 of the neighboring memory cells NC, which are not shared with the memory cell MC are not connected to the global bitlines GB1 and GB2. By applying suitable potentials VS and VD to the first global bitline GB1 and to the second global bitline GB2, respectively, a current IM will flow through the memory cell MC. An erased memory cell MC allows a higher current IM to flow than a programmed cell, so that the state stored in the memory cell MC can be determined by measuring the current IM flowing through it.
Ideally, the current IS flowing into the sense amplifier SA is equal to the current IM flow through the memory cell MC. However, due to the neighbor effect a leakage current IL will leak through the neighboring memory cell NC. As a consequence, the current IS measured in the sense amplifier SA is less than the current IM flowing through the memory cell MC. If the leakage current IL is large enough, then the current IS measured may be decreased to such an extent that a programmed memory cell MC is mistakenly read as an erased cell. This will lead to reading failure of the memory as data cannot be correctly retrieved.
FIG. 2 illustrates the neighbor effect during a write operation. The structure shown is similar to the structure of FIG. 1 with the exception that the sense amplifier SA has been replaced by a bitline driver BR. Again, a memory cell MC is selected by closing the switching elements SE and connecting the bitlines BL1 to the first global bitline GB1 and the bitline BL2 to the second global bitline GB2. To program the memory cell MC suitable potentials VS and VD are applied to the first global bitline GB1 and the second global bitline GB2, respectively. At the same time a programming potential VP is applied to the wordline WL in form of pulses, which causes a programming current IP to flow. Due to the neighbor effect some of the programming current IP will leak into the neighboring cell NC. As a consequence, the current IM flowing through the memory cell MC is reduced by the leakage current IL and the programming efficiency is reduced. Depending on the magnitude of the leakage current IL, a different number of programming pulses is needed for different memory cells MC requiring complicated programming and verification algorithms to ensure that the correct state has been stored in the memory cell MC. There is, therefore, a need to reduce the influence of the neighbor effect as much as possible.
In prior art the neighbor effect problem has been solved by charging or discharging all bitlines before each operation. However, the charge/discharge operation increases the power consumption of the semiconductor memory as all the bitlines have to be charged or discharged. A further disadvantage is that the time required for operating the memory cells is increased as the charge/discharge operation must be performed before each operation and due to RC time constant involved this takes a certain time.
Other solutions to the neighbor effect problem include providing a select transistor incorporated in the memory cell. The select transistor disconnects one of the drain/source regions of the unselected memory cell from the global bitlines. However, providing a select transistor for each memory cell significantly increases the area of the memory array.
Alternatively, the leakage current has been reduced by providing isolation, so that less memory cells provide a path for the leakage current. Again, this method has an area penalty due to the area required for the isolation elements.
Another approach is to connect a smaller number of memory cells to each sense amplifier, so that less leakage currents contribute to the current measured in the sense amplifier and to reduce the time required for reading. However, providing a greater number of sense amplifiers also requires a larger chip area.
In still further solutions, complicated re/write cycles are used together with decoding in order to reduce the leakage current.